PhD defence of Mohammad Reza Safaee Ardestani – Toward scalable photonic computing: single- and dual-transverse mode architectures
Abstract
Optics and photonics offer a compelling path to overcoming the power and speed limitations of the state-of-the-art electronic systems, particularly for the specialized applications such as machine learning acceleration and quantum information processing. By exploiting the intrinsic advantages of light, such as high bandwidth and spatial parallelism, photonic processors enable high-performance computation. Among these, coherent interferometric photonic processors have emerged as a prominent architecture for implementing matrix-vector multiplication, where a mesh of tunable Mach-Zehnder interferometers (MZIs) coherently manipulates light to perform linear transformations. The scalability of such systems is hindered due to several factors, including calibration and reconfiguration complexity that increases with mesh size, raising power consumption, and reducing system uptime.
This thesis addresses the calibration challenge by analyzing the root causes of phase errors in rectangular mesh topologies, specifically the inability to directly access or monitor internal phase shifters during calibration and programming. This leads to cumulative errors and demands iterative, computationally expensive optimization. To overcome this, an approach based on diagonal optical paths is employed at the cost of using N²/4 additional blocks. By performing calibration and programming along diagonal paths, the contributing effects of the adjacent MZIs are suppressed, significantly reducing crosstalk and computational overhead. Experimental results on a 4×4 SOI-based photonic mesh demonstrate robust performance, enabling up to a 79% error reduction compared to an offline calibration method. This contributes directly to mitigating one of the key factors behind the scalability challenge as the reconfiguration complexity, time, and power consumption.
To further mitigate the scalability bottleneck, this thesis introduces a mode-selective thermo-optic phase shifter (MS-TOPS), based on subwavelength grating structures. This innovative device selectively tunes the phase of a higher-order transverse electric mode (TE1) without requiring mode conversion to the fundamental (TE0), allowing dual transverse modes to be simultaneously processed on-chip. A good selectivity is realized with a worst-case modal crosstalk of -13.1dB over a 40nm wavelength range. The MS-TOPS facilitates independent modal control, unlocking applications in spatial switching and multimode optical computing. This effectively doubles the processing capacity, contributing directly to scalable MZI-based architectures.
Complementing the aforementioned contributions in coherent optical computing, the thesis also explores the scalability challenge in noncoherent photonic processors, particularly those based on wavelength-division multiplexing (WDM) and microring resonators (MRRs) for multiply-and-accumulate (MAC) operations. Two novel architectures are proposed that leverage mode-division multiplexing (MDM) to extend the functionality of MRR-based MAC units. A proof-of-concept two-mode vector-vector multiplication is demonstrated at 1541.4nm with a modal crosstalk of 20dB by employing independent binary weighting of TE0 and TE1 MRRs. Experimental results on an SOI platform confirm the feasibility of this approach at low speed, with reasonable modal crosstalk over C-band. This study establishes a foundational framework for the expansion of on-chip photonic computing to incorporate additional higher-order modes through a hybrid WDM-MDM approach, thereby permitting an n-fold scalability for an n-mode system.
Collectively, the contributions of this thesis form a cohesive innovative strategy to address the scalability limitations in photonic processors. By targeting both coherent and noncoherent platforms and by leveraging multi-transverse mode operations alongside architectural innovations, this work contributes to the development of more scalable and high-performance optical computing engines.