Fall 2012 – Summer 2013
Electrical Engineering : The place of logic synthesis in microelectronics. Representations of Boolean functions: logic covers, binary decision diagrams. Two-level synthesis algorithms, Espresso. Multi-level synthesis to Boolean networks: don't care methods, algebraic optimizations, delay modelling. Sequential synthesis: state-based optimizations, state assignment, network optimizations. Technology mapping: library cell and FPGA mapping.
Terms: This course is not scheduled for the 2012-2013 academic year.
Instructors: There are no professors associated with this course for the 2012-2013 academic year.